There is known a flash memory and an FeRAM (Ferroelectric Random Access Memory) as a non-volatile memory capable of storing information even if a power source is turned off.
The flash memory has a floating gate buried in a gate insulating film of an insulated-gate field effect transistor (IGFET), and stores information by accumulating charges that become storage information in the floating gate. Tunnel current passing through a gate insulating film needs to be flown in order to write and erase information, and thus relatively high voltage is required.
The FeRAM has ferroelectric capacitors that store information by utilizing hysteresis characteristics of ferroelectric. A ferroelectric film formed between an upper electrode and a lower electrode in the ferroelectric capacitors generates polarization according to voltage applied between the upper electrode and the lower electrode, and the polarity of spontaneous polarization is inverted when the polarity of applied voltage is inverted. It is possible to read out information when the polarity and the strength of the spontaneous polarization are detected.
The FeRAM has an advantage that it operates by lower voltage and is capable of high-speed writing at saved power comparing to the flash memory.
The memory cell of the FeRAM, as described in Document 1 (Japanese Patent Laid-open 2001-60669 publication), for example, has a MOS transistor formed on an silicon substrate, a first interlayer insulating film formed on the silicon substrate and the MOS transistor, ferroelectric capacitors formed on the first interlayer insulating film, a second interlayer insulating film formed on the ferroelectric capacitors and the first interlayer insulating film, conductive plugs that are buried in holes formed in the first and second interlayer insulating films and connected to the MOS transistor, a first wiring pattern that connects the conductive plug with the upper electrode of the ferroelectric capacitor, a third interlayer insulating film formed on the first wiring pattern and the second interlayer insulating film, and a second wiring pattern formed on the third interlayer insulating film.
Meanwhile, when the first wiring pattern is formed of aluminum, the remanent polarization characteristic of the ferroelectric capacitor deteriorates due to the tensile stress of the first wiring pattern. To improve this, Document 2 (Japanese Patent Laid-open 2001-36025 publication) describes that an aluminum film is heated at temperature exceeding Curie point (Curie Temperature) of the ferroelectric film that constitutes the ferroelectric capacitor to loosen the tensile strength, and then the aluminum film is patterned to form a wiring pattern.
Further, Document 3 (Japanese Patent Laid-open 11-330390 publication) describes that an interlayer insulating film is formed so as to have tensile stress to the ferroelectric capacitor.
Furthermore, Document 4 (Japanese Patent Laid-open 6-188249 publication) describes a method of suppressing warp of a substrate by forming an SiN film, which has composition and a film thickness same as the composition and the film thickness of an SiN film formed on a substrate surface before forming the capacitors, on the rear surface of the substrate.
According to Document 1, the interlayer insulating film covering the ferroelectric capacitors has strong compressive stress where force in a self-expanding direction works. Therefore, when a plurality of interlayer insulating films are formed on the ferroelectric capacitors in a laminated manner, contractive force is applied to the ferroelectric capacitors every film forming step, and thus it deteriorates the ferroelectric capacitors.
Further, according to Document 2, since the interlayer insulating film still exists in spaces between the first wiring patterns, there is still a problem that the compressive stress of the interlayer insulating film deteriorates the ferroelectric capacitors regardless of the stress of the first wiring pattern.
Furthermore, according to Document 3, the interlayer insulating film having tensile stress has high moisture content, and thus it results in another problem such that the moisture deteriorates the ferroelectric capacitors.
Still further, in the method of Document 4, survey by the inventors of the present invention made it clear that stress applied to the capacitors significantly varied in a wafer and uniform stress adjustment was difficult.